TV safe area

evildragon · Post by **evildragon** » Thu Oct 04, 2007 5:04 pm

Fonzie wrote:It is a utility that read the microphone values of your soundcart?
Nice idea Strange that you don't get so so precises values... maybe 44000hz don't do it for Hsync?.

Yea, it uses the soundcards "ADC" as an oscilloscope, I was sampling at 48KHz, should be enough...

It's only what on a TV, 15 something KHz?

Chilly Willy · Post by **Chilly Willy** » Thu Oct 04, 2007 5:07 pm

Fonzie wrote:It is a utility that read the microphone values of your soundcart?
Nice idea Strange that you don't get so so precises values... maybe 44000hz don't do it for Hsync?.

Considering HSYNC is not quite 16 kHz, 44 kHz isn't gonna hack it. Hard to measure several hundredths of a 16 kHz period when you're sampling only 3X that.

evildragon · Post by **evildragon** » Thu Oct 04, 2007 5:09 pm

Well, you can still see the main falling and rising edges, so you should be able to atleast get something from it.

Jorge Nuno · Post by **Jorge Nuno** » Thu Oct 04, 2007 6:18 pm

HAHA, ROTFLOL! Syncs look like this:

only the vertical blanking period is shown...

C-sync[1] + Vsync[2]

Video [1] + Hsync[2]

cell phone pics....

If anyone wants too see something on the scope, ask for it until Tuesday...
[Specify details]

Every Tuesdays I will be in a small room in the university with some "heavy equipment"

evildragon · Post by **evildragon** » Thu Oct 04, 2007 7:02 pm

Well the one that mine did get right was VSync, but i never screencapped that..

EDIT: Oh yea, no way is my sound card going to be that fast to show those kind of rising and falling..

gotta fix my techtronix (or whatever the hell its called)

Eke · Post by **Eke** » Thu Oct 04, 2007 7:22 pm

Jorge Nuno wrote:HAHA, ROTFLOL! Syncs look like this:

only the vertical blanking period is shown...

C-sync[1] + Vsync[2]

Video [1] + Hsync[2]

cell phone pics....

If anyone wants too see something on the scope, ask for it until Tuesday...
[Specify details]

Every Tuesdays I will be in a small room in the university with some "heavy equipment"

thanks for taking the time to do this

what would be nice would be, having the MCLK signal as reference, to observe, in H32 and H40 mode:

1/ /HSYNC signal to get the line length in number of cycles
2/ /VSYNC signal to get the frame length in number of cycles
3/ VINT and HINT occurence (through /IPL1 and /IPL2 pins) and also ZINT occurence (/INT pin)
4/ /Y1 pin to get the active display period

this is based upon what Charles MacDonald did for the SMS:
http://www.smspower.org/forums/viewtopi ... 3e2732433a

Jorge Nuno · Post by **Jorge Nuno** » Thu Oct 04, 2007 7:32 pm

H32 won't be possible for now, because the sonic compilation cart is under a remapping process...

Is the MD bios in 256px mode? I can stop the VDP anytime, or halt the cpu...

/Y1 is /YS? Just read the link you posted, seems it is... see my thread about /YS (tough it doesn't give any timming details)

TmEE co.(TM) · Post by **TmEE co.(TM)** » Fri Oct 05, 2007 8:05 am

MD BIOS is 320px

My sound card can process 2MB of data/sec (according to datasheet) so in theory it can sample at 1MHz, BUT the old win95 driver doesn't allow it... Yamaha YMF719

Jorge Nuno · Post by **Jorge Nuno** » Tue Oct 09, 2007 10:16 am

Eke wrote: thanks for taking the time to do this

what would be nice would be, having the MCLK signal as reference, to observe, in H32 and H40 mode:

1/ /HSYNC signal to get the line length in number of cycles
2/ /VSYNC signal to get the frame length in number of cycles
3/ VINT and HINT occurence (through /IPL1 and /IPL2 pins) and also ZINT occurence (/INT pin)
4/ /Y1 pin to get the active display period

this is based upon what Charles MacDonald did for the SMS:
http://www.smspower.org/forums/viewtopi ... 3e2732433a

OK I got IPL1 and video on the scope, It's triggered on line 255 (the scope says, but at the end of VSYNC it's already line 7...

), but how do I count cycles? from line 255 to IPL1? the clock of 53MHz is so damn fast... even 13MHz is so much...

IPL1 and Video ^

Period from High-to-Low (in the pic is L-to-H but it's wrong) video transition (line 255 start (I think it's always BC)) to active IPL1 is approximately 8.5 uS

Little update: IPL2 and IPL1 are triggered exactly at the same time when Hsync is configured to line 255 in the VDP reg.

Eke · Post by **Eke** » Tue Oct 09, 2007 12:51 pm

OK I got IPL1 and video on the scope, It's triggered on line 255 (the scope says, but at the end of VSYNC it's already line 7... Question ), but how do I count cycles? from line 255 to IPL1? the clock of 53MHz is so damn fast... even 13MHz is so much...

maybe you could get the cycle count either from the 68000 CLK input (7.67 Mhz) or the Z80 CLk input (3.58 Mhz) since we know they are exactly divided by 7 and 15 from the 53Mhz clock. It should be les precise but still enough to get some idea about the scanline/frame duration.

Little update: IPL2 and IPL1 are triggered exactly at the same time when Hsync is configured to line 255 in the VDP reg.

Does not this setting make Level 4 INT (Hint) never happen ?
I think that IPL2 and IPL1 are indeed triggered at the same time to produce a level 6 INT (IPL0 input is left to the ground so level 2,4,6 interrupts should logically be triggered by managing resp. IPL1, IP2, IPL1&IPL2 together... Even if Sega's scanned appendum 3 seem to indicate that Hint is triggered by setting /IPL1 LOW, which is probably a documenation mistake, VDP IPL1 and IPL2 output are probably wired to the respective 68000 inputs.

Anyway, I think the best way to test interrupts timings would be to test them separetely (enabling only one at the same time) and for Hint, set the VDP registers so that the interrupt occurs at each line (reg[10] = 0h)

Jorge Nuno · Post by **Jorge Nuno** » Tue Oct 09, 2007 1:11 pm

Ummm there is a very old HP logic analyser in here (with a bootdisk), but I never used one...

I already got through some pages in the manual, there are piles of little probes connected to the back, phew! I think this is what I need to measure what you asked...

With setting 255, Hints are completely disabled, and that reg I think it's only to choose the interrupt line, not the interval of Hints...

I think Sonic3 uses Hints to change the pallette in water levels, and the level of the water is translated to Hinterrupt line

Or is it? I can't test homebrew yet

BTW, IPL1 & 2 from the VDP are wired directly to the 68000

TmEE co.(TM) · Post by **TmEE co.(TM)** » Tue Oct 09, 2007 2:12 pm

In Sonic 3, the value in Hint reg correspondends to the line where water is... and 255 is when there's no water.

Eke · Post by **Eke** » Tue Oct 09, 2007 2:28 pm

TmEE co.(TM) wrote:In Sonic 3, the value in Hint reg correspondends to the line where water is... and 255 is when there's no water.

as far as I know, register #10 setups a counter which is only decremented on lines 0-224. The counter value is reloaed:
1/ at the start of a new frame
2/ when the counter expired (Hint becomes pending)
3/ on lines 225-261.

This way, programming register #10 with a value above 224 simply prevents Hint from being pending (whereas bit IE1 in register #0 enable/disable Hint from being processed to the CPU via IPL1 & IPL2, but Hint remains pending as long it has not been acknowledged by the CPU)
255 is the default value I suppose.

Anyway, without homebrew, it would be difficult to test interrupts timing since you can only enable/disable interrupt by software via IE0&IE1 bits in VDP registers (I don't know about the initial state but they are probably both disactivated)

but I think (maybe I'm wrong) that HSYNC and VSYNC signals are not managed by software, only by the VDP hardware: they respectively indicate that a new scanline and a new frame has been emited

what would be interesting (if your oscilloscope is precise enough) would be to count the exact number of 68000 (or Z80) cycles between two /HSYNC high-to-low transitions.
this would give the exact number of CPU cycles (maybe not an integer) running during one scanline

another interesting thing would be to count the number of /HSYNC high-to-low transitions between two /VSYNC high-to-low transition: this would give the exact number of scanlines in one frame. This is supposed to be 262 and 313 (for PAL megadrive) but maybe this is something more like 262.5 or 312.5 ?

Jorge Nuno · Post by **Jorge Nuno** » Tue Oct 09, 2007 10:10 pm

Hsync and Vsync are generated by the VDP, even if isn't no game....

Lines are integers, but I didn't count them...

Tomorrow there is more...

Shiru · Post by **Shiru** » Tue Oct 09, 2007 10:15 pm

Eke wrote:This is supposed to be 262 and 313 (for PAL megadrive) but maybe this is something more like 262.5 or 312.5 ?

Afaik, for PAL it must be 312 for even and 313 for odd frames (that gives overall 312.5).