Search found 885 matches
- Sun Mar 07, 2021 11:58 am
- Forum: Video Display Processor
- Topic: VDP Status Register
- Replies: 28
- Views: 192962
Re: VDP Status Register
It is possible this game suffers from slowdown on real hardware too, I can't really tell without testing it.
- Sun Mar 07, 2021 11:27 am
- Forum: Video Display Processor
- Topic: VDP VRAM access timing
- Replies: 40
- Views: 127708
Re: VDP VRAM access timing
According to Nemesis intial post If the cells in layer A and B are perfectly aligned to the screen, so that every cell is entirely visible, these additional reads are still performed, but the results are not used. so the column -1 is always being fetched, even when xcroll & 15 = 0 and the pixel out ...
- Sat Mar 06, 2021 9:47 am
- Forum: Mega/SegaCD
- Topic: Popful Mail
- Replies: 17
- Views: 350742
Re: Popful Mail
Excellent
Now next challenge: let's find out why sprites are invisible in all existing Sega CD emulators during the intro of Radical Rex. This one has been puzzling me for quite some time now (sorry to hijack thread )
Now next challenge: let's find out why sprites are invisible in all existing Sega CD emulators during the intro of Radical Rex. This one has been puzzling me for quite some time now (sorry to hijack thread )
- Fri Mar 05, 2021 9:38 am
- Forum: Video Display Processor
- Topic: VDP Status Register
- Replies: 28
- Views: 192962
Re: VDP Status Register
Sorry to resurrect this old topic but I was wondering if anyone tested if the HBLANK flag (bit 2) was still set normally during VBLANK ? I could not find any info about this but maybe it was already confirmed somewhere ? The reason I ask is that an user reported the game "Double Dragon II" having so...
- Fri Mar 05, 2021 9:15 am
- Forum: Video Display Processor
- Topic: Megadrive video timings
- Replies: 123
- Views: 174720
Re: Megadrive video timings
Eke if you read this post i don't see very good how you emulate DMA trigger in middle of instruction in genesis plus. When 68k write the first word what happen in vdp code? You execute the vdp until the DMA finish (render all the line necessary) and then switch back to 68k core to execute second wo...
- Wed Feb 24, 2021 12:43 pm
- Forum: Megadrive/Genesis
- Topic: Problem Expanding Super Monaco GP
- Replies: 9
- Views: 15708
Re: Problem Expanding Super Monaco GP
My bet is that you are triggering an address error exception (which is not emulated in Kega Fusion) because some of the pointers you changed now points to a misaligned address, which would cause the CPU to crash on real hardware (and most recent emulators). You have to make sure any data you are add...
- Thu Jul 23, 2020 8:18 pm
- Forum: Sound
- Topic: Sega CD Mode 1 support functions for SGDK
- Replies: 25
- Views: 89872
Re: Sega CD Mode 1 support functions for SGDK
It is suppose to work with Genesis plus gx, but i can not find any guide for that, so any help is welcome Sorry, I didn't see this post earlier but it's indeed not well documented. It's quite simple to activate Mega CD mode 1 though (I call it "cartridge boot" mode): just put the cue file and assoc...
- Tue Jul 21, 2020 10:48 am
- Forum: Mega/SegaCD
- Topic: mcd-verificator (CD core accuracy tests)
- Replies: 26
- Views: 184594
Re: mcd-verificator (CD core accuracy tests)
I don't think the problem with MCD emulation on flashcarts with 32x is caused by /DTACK since /DTACK is asserted by the console itself when accessing Mega CD registers (in 0xA120xx range). I believe the problem is due to 32X not connecting all address lines to cartridge, which makes it impossible to...
- Tue Jul 14, 2020 4:50 pm
- Forum: Mega/SegaCD
- Topic: mcd-verificator (CD core accuracy tests)
- Replies: 26
- Views: 184594
Re: mcd-verificator (CD core accuracy tests)
@KRIKzz: I have a question regarding a specific test in CDC section (see code below in test_std.c) //check cdc registers increment mcdWR16(0xff8004, 0x0001); for (i = 1; i < 32 + 8; i++) { val = mcdRD8(0xff8005) & 0x1F; if (i < 32) { if (val != i)return 0x08; //address should increment up to 31 (inc...
- Thu Jul 02, 2020 12:09 pm
- Forum: Mega/SegaCD
- Topic: mcd-verificator (CD core accuracy tests)
- Replies: 26
- Views: 184594
Re: mcd-verificator (CD core accuracy tests)
My bad, I forgot checksum was only the last nibble (RS9). Now I wonder why RS8 bit 2 is set only for 3 frames while reading TOC (RS0=0×9) ? It apparently still returns disc flags even when reporting 'not ready' status (RS1=0xF) and, according to C-Trac sourcecode, bit 2 indicates the current sector ...
- Thu Jul 02, 2020 6:42 am
- Forum: Mega/SegaCD
- Topic: mcd-verificator (CD core accuracy tests)
- Replies: 26
- Views: 184594
Re: mcd-verificator (CD core accuracy tests)
Thank your for this and for publishing your source and notes, this could indeed be quite useful to figure some undocumented stuff and improve Mega CD emulation accuracy overall. The CDD status/command logs from real hardware are also very helpful to figure the timings of the various commands and ass...
- Mon Dec 30, 2019 8:38 am
- Forum: Megadrive/Genesis
- Topic: M68K Bus Control and Vdp
- Replies: 26
- Views: 50589
Re: M68K Bus Control and Vdp
I've been always wonder, why arbiter uses ZA[0], now I know why. Yes, it also seemed the most logical to me that ZA0 is connected to /UDS by the bus arbiter on 68k access to Z80 bus, my theory did not contradict that. The question was more to know if the I/O chip uses ZA0 to know which byte (VD15-V...
- Sat Dec 21, 2019 4:42 pm
- Forum: Megadrive/Genesis
- Topic: M68K Bus Control and Vdp
- Replies: 26
- Views: 50589
Re: M68K Bus Control and Vdp
That's weird because I found a test ROM made by Mask of Destiny (see this post ) which actually tests word writes from 68k to Z80 RAM and it actually verifies the opposite (it writes $BEEF to $A00002 then expect $BE to be read from $A00002 as byte, while $A00003 retains previous value). You could th...
- Thu Dec 19, 2019 7:26 pm
- Forum: Megadrive/Genesis
- Topic: M68K Bus Control and Vdp
- Replies: 26
- Views: 50589
Re: M68K Bus Control and Vdp
From gen-hw.txt Word-wide writes When doing word-wide writes to Z80 RAM, only the MSB is written, and the LSB is ignored: 0000: AA BB CC DD ; Z80 memory move.w #$1234, $A00000 ; do a word-wide write 0000: 12 BB CC DD ; result Word-wide reads A word-wide read from Z80 RAM has the LSB of the data dupl...
- Thu Jun 13, 2019 5:32 am
- Forum: Megadrive/Genesis
- Topic: DETECTING RedKid2500-based consoles
- Replies: 9
- Views: 25487
Re: DETECTING RedKid2500-based consoles
Couldn't you simply try to detect the presence of extended RAM ?
See this thread: viewtopic.php?f=2&t=2460&p=32814&hilit=firecore#p32814
See this thread: viewtopic.php?f=2&t=2460&p=32814&hilit=firecore#p32814