Search found 885 matches
- Wed May 01, 2019 6:25 am
- Forum: Mega/SegaCD
- Topic: Questions on writing a new Mega CD emulator
- Replies: 117
- Views: 10955438
Re: Questions on writing a new Mega CD emulator
X'Eye and Wondermega1/2 BIOS are compatible with Genesis Plus GX using the exact same CDD emulation model as with other models so I don't think CDD programs are incompatible or even so much different but rather that they are all based on the same source, with some added internal functions to support...
- Tue Apr 30, 2019 8:56 pm
- Forum: Mega/SegaCD
- Topic: Questions on writing a new Mega CD emulator
- Replies: 117
- Views: 10955438
Re: Questions on writing a new Mega CD emulator
Is ff8038-ff8041 writable? (CDD status registers.) I am guessing not, and that they're for the CDD to write to them. Indeed they are not. They are written by the ASIC upon receiving CDD status words through the CDD interface (4 bits at a time). The manual says that writing ReceiveStatus[7] generate...
- Tue Apr 30, 2019 6:24 am
- Forum: Mega/SegaCD
- Topic: Questions on writing a new Mega CD emulator
- Replies: 117
- Views: 10955438
Re: Questions on writing a new Mega CD emulator
Would that apply to the RAM as well? Seems like it would Yes, the main ASIC is handling entire sub-CPU address decoding so this apply to everything mapped in sub-CPU range (no software rely on this though) May I ask which document/page? I'm having trouble finding it. You have to look at registers d...
- Mon Apr 29, 2019 6:21 pm
- Forum: Mega/SegaCD
- Topic: Questions on writing a new Mega CD emulator
- Replies: 117
- Views: 10955438
Re: Questions on writing a new Mega CD emulator
Would that apply to the RAM as well? Seems like it would Yes, the main ASIC is handling entire sub-CPU address decoding so this apply to everything mapped in sub-CPU range (no software rely on this though) May I ask which document/page? I'm having trouble finding it. You have to look at registers d...
- Mon Apr 29, 2019 9:57 am
- Forum: Mega/SegaCD
- Topic: Questions on writing a new Mega CD emulator
- Replies: 117
- Views: 10955438
Re: Questions on writing a new Mega CD emulator
Oh god, if i had this documentation back in time... i spent so many time (and CD) to RE the MegaCD just for this CDD stuff :D I didn't had any MegaCD back in time and it's Red5 (the guy owning GenesisProject website which was referencing Megadrive emulators compatibility list back in time) who lite...
- Sat Apr 27, 2019 10:45 pm
- Forum: Mega/SegaCD
- Topic: Questions on writing a new Mega CD emulator
- Replies: 117
- Views: 10955438
Re: Questions on writing a new Mega CD emulator
Lastly, about CDD... : $ff8037.d2, HOCK. "Setting this bit causes communication with the CDD to commence." I'm sorry that wasn't vague enough, could you be a little less specific? You have to understand that this register is not supposed to be used by game software developers for which those manuals...
- Sat Apr 27, 2019 8:48 pm
- Forum: Mega/SegaCD
- Topic: Questions on writing a new Mega CD emulator
- Replies: 117
- Views: 10955438
Re: Questions on writing a new Mega CD emulator
Now, about CDC CDC interrupts: these appear to be an amalgamation of four interrupts. DECI = decoder, DTEI = date transfer end, CMDI = command buffer not empty, SYEIN = sync ... something. It's not documented. I don't know anything about the later or where you get that from but I doubt it exists, IF...
- Sat Apr 27, 2019 12:30 pm
- Forum: Mega/SegaCD
- Topic: Questions on writing a new Mega CD emulator
- Replies: 117
- Views: 10955438
Re: Questions on writing a new Mega CD emulator
I've seen people say they mirror every $40 bytes and every $200 bytes. That they only map to a120xx/ff80xx or that they map to a12000-a12fff/ff8000-ffffff. Main-CPU side was verified by Charles (see http://gendev.spritesmind.net/forum/viewtopic.php?f=5&t=1276. Afaik, bus arbiter use VA23-VA8 for de...
- Sat Apr 27, 2019 8:29 am
- Forum: Mega/SegaCD
- Topic: Questions on writing a new Mega CD emulator
- Replies: 117
- Views: 10955438
Re: Questions on writing a new Mega CD emulator
I will try to answer some of your questions later since I faced similar interrogations when adding Mega CD support in Genesis Plus GX but regarding pending int being cleared when disabled, that's something that was needed in Genesis Plus GX to fix some games freezing in some cases (hence the comment...
- Sat Apr 27, 2019 6:42 am
- Forum: Megadrive/Genesis
- Topic: Z80 bus + I/O mapping redux
- Replies: 7
- Views: 14678
Re: Z80 bus + I/O mapping redux
That's a lot of questions and they adress so many different things... I guess I will pick this one But if a game writes to byte to a10002, what happens? The 68K used in the Genesis per 68000UM.pdf states that D8-D15=D0-D7 for byte writes, and that A0 isn't used. Do the I/O ports bother to check /LDS...
- Thu Dec 13, 2018 6:25 am
- Forum: Controls
- Topic: Every peripheral ID?
- Replies: 6
- Views: 11771
Re: Every peripheral ID?
The numbers (1-8) actually refer to panel number in Activator manuals: 1 corresponds to the panel in front of the player then, in clock order, 2, 3, etc One of the manuals can actually be still found here: http://www.segakore.fr/media/segakore/downloads/systemes/activator_game_guide_u.pdf From my ol...
- Sun Nov 25, 2018 9:09 am
- Forum: Sound
- Topic: New Documentation: An authoritative reference on the YM2612
- Replies: 865
- Views: 2384005
Re: New Documentation: An authoritative reference on the YM2612
Nemesis tested the address/data ports relation some years ago http://gendev.spritesmind.net/forum/viewtopic.php?f=24&t=386&start=410 It turns out that writing to an address register stores both the written address, and the part number of the address register you wrote to. You can then write to eithe...
- Mon Nov 19, 2018 8:25 pm
- Forum: Megadrive/Genesis
- Topic: Looping access from 68K and Z80
- Replies: 25
- Views: 32522
Re: Looping access from 68K and Z80
if 68K->Z80->68K was access thought buses it will lock the system at any access not only on VPD access, correct? As said previously, ZA15 is forced low when 68k is accessing Z80 bus so it's not possible to access 68k bank in Z80 memory map upper area ($8000-$FFFF) from 68k since it becomes a mirror...
- Sun Nov 18, 2018 8:15 pm
- Forum: Megadrive/Genesis
- Topic: Looping access from 68K and Z80
- Replies: 25
- Views: 32522
Re: Looping access from 68K and Z80
Well, I/O chip only connects VA1-VA7 and ZA1-ZA7, the rest of address lines are managed by the Bus Arbiter so the most logical is that it sets ZA0 according to !LDS, ZA8-ZA14 with VA8-VA14 and simply forces ZA15 low to prevent access to Z80 bank area, just like it sets VA15-VA23 with bank register s...
- Sat Nov 17, 2018 5:25 pm
- Forum: Megadrive/Genesis
- Topic: Looping access from 68K and Z80
- Replies: 25
- Views: 32522
Re: Looping access from 68K and Z80
Taken both quotes together, it sounds more like the 68000 map decodes mirrors of A00000 for z80 ram, and mirrors of A04000 for FM, and nothing else. He's not sure it does anything at all for the bank address, and freezing for VDP space could just be the mapper not asserting DTACK for an unmapped lo...