Search found 885 matches
- Fri Nov 16, 2018 11:12 pm
- Forum: Megadrive/Genesis
- Topic: Looping access from 68K and Z80
- Replies: 25
- Views: 32632
Re: Looping access from 68K and Z80
Z80 32KB address space is mapped to A0xxxx on 68K. Can Z80 access to its own space using A0 page in upper 32KB? Will it stop 68K while access itself address space because it uses outer loop through 68K? The same opposite question: Z80 has special map of VDP+PSG to 7Fxx address. Can 68K access VDP/P...
- Mon Oct 15, 2018 8:39 pm
- Forum: Megadrive/Genesis
- Topic: Bus Arbiter and IO Chip Access
- Replies: 28
- Views: 42229
Re: Bus Arbiter and IO Chip Access
I think it's just you are not talking about the exact same thing. EDCLK pattern is definitively 15 pulses at MCLK/5 followed by 2 pulses at MCLK/4, this can still be seen in Tiido pictures, even the second one where he observed pixels with 9 MCLK cycles . Pixel clock (SCLK) pattern is different beca...
- Mon Oct 15, 2018 9:07 am
- Forum: Megadrive/Genesis
- Topic: Bus Arbiter and IO Chip Access
- Replies: 28
- Views: 42229
Re: Bus Arbiter and IO Chip Access
VA0 has neither a 315-5339 nor a 315-5345, but instead has an EDCLK generator made out of 74-series logic on a daughter board . There's also at least one 74-series chip on the main PCB between the work RAM chips (presumably for the A14/OE fixes for SMS/MarkIII mode). I know yes, what I meant is tha...
- Thu Oct 11, 2018 9:15 am
- Forum: Megadrive/Genesis
- Topic: Bus Arbiter and IO Chip Access
- Replies: 28
- Views: 42229
Re: Bus Arbiter and IO Chip Access
SCBR is generated by the VDP so it's probably an input. Interestingly, this signal isn't connected to the 5364 chip in the VA3 at all. It just goes straight from the VDP to the color encoder. Actually, are you sure this is actually SBCR (connected to VDP pin 50) and not VCLK (connected to VDP pin 4...
- Wed Mar 07, 2018 1:05 pm
- Forum: Video Display Processor
- Topic: Tectoy's weird VDP behavior
- Replies: 24
- Views: 33321
Re: Tectoy's weird VDP behavior
The new tilemap data snaps in entirely during one frame, as if the fifo was massive, but I can't think of any reason for the delay. That is most likely the case, the clone is probably using a much larger FIFO (or a VRAM cache). Remember that: 1) DMA will release 68k bus and software execution as so...
- Tue Oct 24, 2017 3:01 pm
- Forum: Sound
- Topic: New Documentation: An authoritative reference on the YM2612
- Replies: 865
- Views: 2391583
Re: New Documentation: An authoritative reference on the YM2612
Some more news about YM2612 DAC "ladder" effect: a guy named Nuked who analyzed YM3438 die shots recently wrote a cycle-accurate implementation in C and figured the effect was actually caused by two things: 1 ) the fact that the resistor array would not exactly reach Vcc/2 on either negative or posi...
Re: XE-1AP
Yes, it was mostly emulated by reversing the various games that use it and then later completed (the unused buttons mostly) using some XE-1AP driver code that was posted on sega-16 http://www.sega-16.com/forum/showthread.php?30101-XE-1AP-Analogue-Controller-Cyber-Stick-CZ-8NJ2-XE-1AJ-Driver-%28Sourc...
- Sun Sep 24, 2017 10:41 pm
- Forum: Megadrive/Genesis
- Topic: Undefined behavior for ABCD and SBCD
- Replies: 36
- Views: 43981
Re: Undefined behavior for ABCD and SBCD
Small update to flamewing's test to trigger a bug in Genesis-Plus-GX at least: https://github.com/flamewing/68k-bcd-verifier/pull/1/commits/8e917e6a6dffe4724c6432c10efde0e3afd720bf http://notaz.gp2x.de/md/rel/bcd-verifier-u1.zip Well, this was indeed a very stupid bug in Musashi: upper bits of NBCD...
- Sat Sep 09, 2017 9:05 pm
- Forum: Mega/SegaCD
- Topic: X-Eye Service Manual and Technical Manual
- Replies: 3
- Views: 13530
X-Eye Service Manual and Technical Manual
I don't know if those are already known but I found these manuals recently https://console5.com/wiki/File:JVC_X%27Eye_RG-M10BU_Service_Manual,_No._20478,_April_1994.pdf https://console5.com/wiki/File:JVC_Technical_Manual_X%27Eye_RG-M10BU,_1994.pdf They are quite interesting to read compared to other...
- Tue Aug 29, 2017 8:40 am
- Forum: Megadrive/Genesis
- Topic: VDP DMA fill in Ballz 3D; not writing fill byte
- Replies: 11
- Views: 17030
Re: VDP DMA fill in Ballz 3D; not writing fill byte
That's not it, no. Let's ignore Ballz 3D and presume a test ROM: We set up for a VDP DMA fill operation and set CD5, but then we don't write the fill byte. And there's no FIFO slots available to pull it from, the FIFO is totally empty. Instead, we poll the VDP status bit 1 (DMA) waiting for it to b...
- Tue Aug 22, 2017 8:17 am
- Forum: Megadrive/Genesis
- Topic: Interlace mode (LSMx=3)
- Replies: 20
- Views: 23479
Re: Interlace mode (LSMx=3)
What I think you are missing, as far as I can tell: - for vscroll, value read from VSRAM must be shifted right by one (VSRAM width is 11-bit but bit0 is ignored in interlaced mode 2) before being added to vcounter value (9-bit) - for sprites, when preparing the sprites list (i.e looking which sprit...
- Mon Aug 21, 2017 11:13 pm
- Forum: Megadrive/Genesis
- Topic: Interlace mode (LSMx=3)
- Replies: 20
- Views: 23479
Re: Interlace mode (LSMx=3)
What I think you are missing, as far as I can tell: - for vscroll, value read from VSRAM must be shifted right by one (VSRAM width is 11-bit but bit0 is ignored in interlaced mode 2) before being added to vcounter value (9-bit) - for sprites, when preparing the sprites list (i.e looking which sprite...
- Tue Jul 11, 2017 10:18 pm
- Forum: Controls
- Topic: Mega Mouse Usage
- Replies: 23
- Views: 43336
Re: Mega Mouse Usage
Yes, that's pretty much it
- Tue Jul 11, 2017 10:10 pm
- Forum: Video Display Processor
- Topic: Is DMA Fill buggy?
- Replies: 11
- Views: 19479
Re: Is DMA Fill buggy?
The 'issue' is that VRAM byte writes (used by VRAM fill and copy DMA) actually occur to VRAM address ^ 1 so you can get unexpected results depending on start address, DMA length and increment alignments. In your case, when VRAM address reaches F000H, last write occurs at F001H instead of F000H. I th...
- Mon Jul 10, 2017 12:10 pm
- Forum: Controls
- Topic: Mega Mouse Usage
- Replies: 23
- Views: 43336
Re: Mega Mouse Usage
I can't really tell what you're doing from the values, but 3-line handshake is simple: start with unselected (0x60), then toggle back and forth between the two selected states (0x20 and 0x00) to get nibbles (0x20 first). That's all there is to it. When you're done, deselect the mouse again (0x60). ...